============================================================== Guild: wafer.space Community Channel: 𐦂𖨆𐀪𖠋 - Friends / tinytapeout / This was a challenging one! After After: 2025-10-31 11:59 p.m. Before: 2025-12-01 12:00 a.m. ============================================================== [2025-11-22 4:17 p.m.] essen__ [2025-11-22 4:17 p.m.] essen__ Nice, how did you guys go about changing the default cell library ? [2025-11-22 6:07 p.m.] rzioma @Essen theoretically it should be just `"STD_CELL_LIBRARY": "gf180mcu_fd_sc_mcu9t5v0",` in `config.json` BUT there is a bug in the PDK that TT is using, so @htamas had to make a patch: https://github.com/TinyTapeout/tt-gds-action/compare/main...rejunity:tt-gds-action-gf180mcu_fd_sc_mcu9t5v0:main [2025-11-22 6:14 p.m.] rzioma So basically you have to 1) clone https://github.com/TinyTapeout/tt-gds-action apply the patch 1.5) add a tag on your patched gds-action repo, I used `ttgf0p2_9t` 2) route your gds.yaml to use patched gds-action repo. something like that: https://github.com/rejunity/tt08-vga-drop/commit/2ac440a4bd84136deccb49f6ed56c4ded1a0a8b7 3) add "STD_CELL_LIBRARY": "gf180mcu_fd_sc_mcu9t5v0", to your `config.json` 4) change Makefile so that Gate Level tests use correct cell library too: https://github.com/rejunity/tt08-vga-drop/commit/22135b09cfd3b970ce26098b89df31547c557192 and you should be done [2025-11-22 6:16 p.m.] rzioma You might get around 10..15% speedup from that [2025-11-22 6:16 p.m.] essen__ Nice, sounds like it was a fun ride. 👍 [2025-11-22 6:16 p.m.] rzioma (but loose in area) [2025-11-22 6:17 p.m.] rzioma for some definition of fun... [2025-11-22 6:17 p.m.] essen__ I think we all here share a common twisted definition. {Reactions} partyblob [2025-11-22 6:18 p.m.] essen__ Haha, maybe I should. For now I don't have any timing issues, at least, assuming the output io doesn't go faster than 50MHz ? 🤷 [2025-11-22 6:19 p.m.] rzioma I don't think this affects IO cells, only logic/dff [2025-11-22 6:19 p.m.] essen__ Yes, just to say that my timing is fine, and I am bottlenecked by the IO, so I have no motivation to up the frequency. [2025-11-22 6:20 p.m.] essen__ We need faster, open source IO so bad 🫠 [2025-11-22 6:21 p.m.] essen__ Anyways, off to lunch 👋 see you around {Reactions} 👍 [2025-11-22 6:21 p.m.] rzioma Yeah, for MAC-array/SystolicArray you bound to be IO bound, I suppose [2025-11-22 6:21 p.m.] rzioma I added some "noob" input caches to my implementation, some time ago [2025-11-22 6:22 p.m.] rzioma https://github.com/rejunity/tiny-asic-1_58bit-matrix-mul {Reactions} 👀 [2025-11-22 6:23 p.m.] rzioma {Attachments} 2025-11_media/image-58839.png [2025-11-22 6:25 p.m.] rzioma And septenary version: https://github.com/rejunity/tt09-septenary-matrix-mul Unfortunately never got fab'd due to eFabless going bonk [2025-11-22 6:56 p.m.] essen__ Any plans on submitting it to a future shuttle ? [2025-11-22 7:33 p.m.] rzioma Yes, for the next sky130 shuttle I would like to implementa input data cache with @tnt SRAM blocks. I am also very tempted to see how large of an array could fit onto the whole wafer.space chip... maybe even buy a wafer for that 😉 but I don't think I will have time for the first shuttle. {Reactions} 🤣 [2025-11-22 7:37 p.m.] essen__ Sounds like more fun incoming 🙂 Haha, an entire wafer, I would like to see you guys do that. [2025-11-22 7:41 p.m.] rzioma ah, sorry, I didn't mean a wafer scale 😉 though that would be fun!!! Instead wafer.space has an option to get uncut wafer for $2000 with 40 chips of your design (but someone needs to cut and package them 😉) but still not a bad deal because that gives approximately 128 TinyTapeout tiles worth of an area. {Reactions} 👀 [2025-11-22 7:57 p.m.] rzioma Back of envelope calculation gives me around 10..20 GOPs (something like 16x20 mac array) for a whole chip on 180nm still far from 1TOps 🙂 [2025-11-22 7:59 p.m.] essen__ @EmbeddedKen this is for you : > get uncut wafer for $2000 with 40 chips of your design (but someone needs to cut and package them 😉) [2025-11-22 8:00 p.m.] essen__ How did I miss that 👀 Damn, looks like I also need a die bonding machine now. [2025-11-22 8:01 p.m.] essen__ How are you planning on doing the cutting and packaging ? Does one of you own the die bonding machine or know someone that does ? [2025-11-22 8:02 p.m.] 246tnt Well the 2000$ option is only as an addition to the 7000$ slot. [2025-11-22 8:03 p.m.] 246tnt So it's just to get a neat souvenir ... or if you want to do wafer level probing I guess. [2025-11-22 8:09 p.m.] essen__ So sad, you got my hopes up there for a second. 🤣 [2025-11-22 8:12 p.m.] 246tnt There is a fixed number of slots in the reticle ... so the price is pretty much production_cost / num_slots ... 2k$ is the cost to run one more wafer through the flow. [2025-11-22 8:13 p.m.] 246tnt The production costs are (simplified) maskset_cost + n_wafer * wafer_processing_cost and the mask costs is the big chunks and the part which has a limited number of slots. {Reactions} 👍 [2025-11-22 9:20 p.m.] rzioma Sad 😉 {Reactions} 🫂 [2025-11-23 6:59 p.m.] essen__ Still a great deal though ============================================================== Exported 34 message(s) ==============================================================